Thermal distribution and reliability prediction for 3D networks-on-chip

nchmark. With synthetic 
also adopt the method in [32] where we remove benchmarks, TSV-based 3D-NoC is slightly 
the bonding layers between silicon layers. We better than Monolithic ones. 
keep the thickness of the silicon layer as it is for 
a fair comparison. Obviously, if we thin the 4.4. Exploring Different Layout and Thermal 
layer, the transfer of heat is much faster. Dissipation Method 
 Figure 9 shows the router temperature In this section, we explore different layouts 
under the PARSEC benchmark. Here, we also and their thermal dissipation behaviors for our 
compare with the monolithic technology where 3D-NoC. First, we perform thermal and 
no TSV needed [32]. As we can observe in reliability prediction for our layout in Figure 
Figure 9, the TSV-based system has lower 2(b). Then, we insert four thermal TSVs with 
operating temperature thanks to the ability to the size 15 15 in four corners of the 
transfer the heat of Copper TSVs. The 
 router floorplan in Figure 2(c). This size of 
difference in temperature is around 1K at TSV is still feasible in the existing manufacture 
the bottom layer and even reach 3.5K in the 
 process [7]. We also add 10 Keep-out-Zone 
cannel benchmark. 
 distance this thermal TSV to avoid mechanical 
 Figure 10 shows the operating temperature 
 stress. The thermal TSV went through all layers 
under synthetic benchmarks of our 3D-NoC. 
 of TSVs but did not contact with the heatsink. 
We can easily notice that the operating 
 The heatsink and thermal TSV are separated by 
temperature of Monolithic systems is much 
 a layer of thermal interface material. 
higher than TSV ones since we stress the 
system under its saturation points. The highest 
temperature of Monolithic 3D-NoC even 
reaches 351.64 K (78.49°C). The hottest layer 
of the TSV-based system has a similar 
temperature as the coolest layer of Monolithic 
3D-NoC. 
 Figure 11. Normalized MTTF of our 3D-NoC under 
 PARSEC benchmarks. 
 Figure 10. Temperature of our 3D-NoC under 
 synthetic benchmarks. 
4.2. 3D-NoC Reliability Estimation 
 In this section, we use the Black’s model to 
evaluate the MTTF of 3D-NoC. Figure 11 and 
Figure 12 show the normalized MTTF of each 
layer to 323.15K (50°C) under PARSEC and 
synthetic benchmarks. Here, we can observe the 
TSV-based 3D-NoC dominates Monolithic in Figure 12. Normalized MTTF of our 3D-NoC under 
 synthetic benchmarks. 
74 K.N. Dang et al. / VNU Journal of Science: Comp. Science & Com. Eng., Vol. 36, No. 1 (2020) 65-77 
 Figure 13 and Figure 14 show the thermal significantly cool down the bottom layer. Also, 
behaviors under PARSEC and synthetic liquid cooling could be extremely helpful in 
benchmarks for different layouts and cooling. this situation. 
We can notice that the layout in Figure 2(b) has In comparison to the traditional 2D-ICs, we 
the worst thermal behavior among the TSV observe that the TSV-based ICs have higher 
designs. On the other hand, adding thermal operating temperatures. The 2D-based 3D-
TSV can help reduce the operating temperature NoCs operate under 319K and 322K with 
significantly. By adding four TSVs, we can PARSEC and synthetic benchmarks, 
even reduce the temperature by nearly 1K at the respectively. On the other hand, TSV-based 
bottom layer in the uniform benchmark which system increases at most 10K in maximum 
is the most stressed benchmark. Other temperature with the layout in Figure 2(b). 
benchmarks’ results also show a slight In summary, different layouts can make 
improvement in thermal behaviors. different thermal behaviors. The layout in 
 One thing we can easily notice the top Figure 2(b) does not surround the router by 
layer’s temperatures do not change. This is due TSV area, therefore, the router could heat up 
to the fact it is already cool down by the each other and reach a higher temperature. On 
heatsink and adding TSV cannot help it reduces the other hand, adding thermal TSV to cool 
the temperature. Also, the heatsink temperature down the bottom layer is helpful since it can 
is raised near the top layer temperature which reduce nearly 1 Kelvin in the worst case. By 
reduces the ability to transfer heat. If the mapping to the reliability, we can easily obtain 
thermal TSV can contact the heatsink, it can a 2×~3× improvement of MTTF. 
 G 
 Figure 13. Thermal behavior of different layouts and cooling methods under the PARSEC benchmark. 
 Figure 14. Thermal behavior of different layouts and cooling methods under the synthetic benchmarks. 
 K.N. Dang et al. / VNU Journal of Science: Comp. Science & Com. Eng., Vol. 36, No. 1 (2020) 65-77 75 
4.5. Execution Time TSV-based 3D-NoCs due to two major reasons: 
 i) TSVs act like thermal conduct devices and 
 In this work, we evaluate the proposed ii) Monolithic 3D-ICs has a higher density than 
method using a system with Xeon E5-2620 8 TSV-based system. However, we would like to 
cores 2.1GHz, 16GB RAM and Linux note that Monolithic 3D-ICs have lower area 
Subsystem and PowerShell under Windows 10. cost than TSV-based systems. 
The platform is written under C++, Python, and Fluid cooling [7] is one of the most 
Bash. The execution time is measured using advanced methods to reduce the operating 
command time under Linux and Measure- temperature of the system. Although we have 
Command under Windows PowerShell. Here, not explored the ability of this method, it has 
the simulation time of PARSEC and synthetic shown promising efficiency for 3D-ICs [7]. 
benchmarks are not considered because they are With a fast velocity of the fluid, we expect the 
separated from our flow. As shown in Table 4, system can be cooled down significantly. 
all steps in our flow perform under two seconds. However, we would like to note that fluid 
Our method easily outperforms in terms of cooling has unknown reliability which needs to 
execution time the fabrication-based methods be carefully investigated for being widely used. 
which usually take hours regardless of designing, 
fabrication and assembly time [10-12]. 
 5. Conclusion 
 Table 4. Execution time of the proposed flow 
 In this work, we proposed a platform to 
 Work Step Time quickly estimate the power, thermal behavior, 
 Ours Power extraction (one 1.22 s and reliability of 3D-NoC systems. The method 
 benchmark) has shown extremely short execution time. We 
 Floorplan generate 0.095 s also analyze and simulate the reliability of TSV 
 Temperature estimation 81 s and Monolithic 3D-ICs. Furthermore, we 
 (one benchmark) explore and compare different layout strategies 
 Reliability estimation (12 1.12 s and cooling methods. 
 benchmarks) From our experiments with 3D-NoC, we 
 [10] Reliability test 96h can realize that lower index layers have higher 
 [11] The longest step in 1000h operating temperatures and are more critical in 
 reliability test terms of reliability. Although this conclusion 
 [12] Lifetime acceleration test 100-5000h cannot cover all possible cases; this is a 
 consensus of the tested benchmark Based on 
 Although our approach is fater than these experiments, designers can decide their 
real-chip testing [10-12], it cannot as accurate fault-tolerance or thermal dissipation up on 
as the baking tests due to the deviations during their required specification. 
simulation and the potential of manufacturing In the future, advanced cooling techniques 
variation. However, as the close-loop design such as liquid could be investigated. The impact 
flow, having an understand of the potential of DVFS and fault tolerance on performance 
reliability threat is helpful for designers. and thermal behavior also could be studied. 
4.6. Discussion 
 In this section, we would like to discuss Acknowledgments 
some technical details of our methods. 
Advantages and drawbacks are also mentioned This research is funded by the Vietnam 
in this part. National Foundation for Science and 
 In our evaluation, we point out that Technology Development (NAFOSTED) under 
Monolithic has a higher temperature than grant number 102.01-2018.312. 
76 K.N. Dang et al. / VNU Journal of Science: Comp. Science & Com. Eng., Vol. 36, No. 1 (2020) 65-77 
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